DESIGN AND IMPLEMENTATION OF RESIDUE NUMBER SYSTEM USING HIGH SPEED REVERSE CONVERTER

Abstract

Residue Number system (RNS) plays a vital role in high speed application like DSP, data
Processing, Microprocessor and Application Specific Integrated Circuits. Reverse Converter design is a
Complex task in RNS. Reverse Converter Performance can be improved by using efficient adder and by
choosing correct moduli set according to the application. The reverse converter has been designed using
Parallel adder for the moduli set{2n, 22n+1-1, 2n-1, 2n +1},{2n, 22n+1-1, 2n-1, 2n +1},{2n, 2 2n +1, 2n +1, 2n _1}
.The Parallel adder based reverse converter has reduced area, delay and power requirements when compared
to the other adders. Thus the reverse converter based on Brent-Kung EAC adder has 8% reduction in area.
when compare to previous structure based reverse converters.

Author

R.Karmugilan, Dr. R. Vijayabhasker