International Journal of Advanced
Science and Engineering Research
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DESIGN AND ANALYSIS OF VEDIC MULTIPLIER USING GDI LOGIC
Abstract
There is many advancement in VLSI technology and there are many designing styles of VLSI circuits. Some of them are CMOS; PTL and GDI techniques (Gate Diffusion Input).GDI technique is a low power digital combinatorial circuit by which we can eradicate the disadvantages of CMOS, PTL techniques. This technique involves advantages of reducing power consumption, propagation delay and area of digital circuits while controlling low complexity of logic design. The different strategy are also compared with respect to the layout area; transistor count, delay and power dissipation are discussed here in this paper showing advantages of GDI and power comparison of GDI compared to CMOS circuit