Reversible logic is the currently going field in the research which results in low heat dissipation and low power consumption. This is the main factor to apply reversible logic in VLSI circuit design. In this paper, half adder, full adder and 4x4 multiplier are proposed using reversible logic. The objective is to reduce area and power consumption in adder and multiplier. These are designed using the basic reversible gates like Feynman, Fredkin and Toffoli gates. By using this reversible logic, number of gates, garbage outputs and constant inputs are reduced. The designed circuits are much more efficient and optimized as compared to the existing method.